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Digital Circuit Design HOMEWORK # 2

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ECE 2029 Introduction to Digital Circuit Design
HOMEWORK # 2

Problems Score Instructor/TA’s Comments
1) /20
2) /30
3) /40
4) /10
Total /100
TA’s/Instructor’s Signature: _________________________ Date: ___________________
Important (TIPS)
1. Show all the process work neatly, don’t just jump to answer. Partial credit may be given.
Box/highlight your answer.
2. Read the problem carefully, don’t assume. Look for the simple, straightforward way to solve
the problem. Don’t overdo yourself.
3. To make the grading easier, please return your homework on this problem sheet.
4. If you need to use an extra piece of paper, please staple it on and number your solutions just
like below!
5. Please turn it into the ECE2029 box located at the ECE department office AK202 above the
shelf just when you walk-in. Don’t forget to put your mailbox number.
Page 2 of 9
Problem 1 – 20 points total
Simplify the following Boolean expression by applying the properties of Boolean algebra, until it matches the simplified form given.
Use the rule numbers, law and theorem names given on the attached sheet to indicate which transformations you have applied in
each step of the process. Since the answer is given, you will be graded on properly expressing the equations at each step in the
sequence as well as the name of the property used at that step.
Note: in the following, I have used the prime notation, x’, as used in the textbook to denote the not operation and shown as in class.
a) Show that xy + x’y + y’(y’ + z) can be simplified to 1. (10 pts)
Page 3 of 9
b) Show that (ab’ . (a + c))’ + a’b . (a +b’ + c’)’can be simplified to a’ + b. (10 pts)
Page 4 of 9
Problem 2 – 30 points total
a) Problem 1, part b, draw the combinational logic circuit diagram using the non-simplified equation:
(10 pts)
(ab’ . (a + c))’ + a’b . (a +b’ + c’)’
Page 5 of 9
b) Form the truth table that fully describes the operation of the circuit from part a, and enter the values in the table provided below.
(10 pts)
Truth Table
c) From the truth table above, form the Standard (Canonical) SOP expression for this logic function (Do Not Simplify): (5 pts)
Output =
d) From the truth table above, form the Standard (Canonical) POS expression for this logic function (Do Not Simplify): (5 pts)
Output=
a b c Output
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Page 6 of 9
Problem 3 – 40 points total
a) State the function F implemented by this circuit as a Boolean expression. (There are many forms and simplifications for F. Just
write down the one that most directly expresses the function of this circuit, don’t simplify it). (10 pts)
F =
Page 7 of 9
b) Design the logic circuit in Logisim and complete the truth table. State the Standard (Canonical)
SOP Boolean logic expression formed by its minterms. (10 pts)
c) State the SOP solution you find above in decimal format by completing the statement below:
(5 pts)
F(A,B,C,D) = ∑A,B,C,D
d) State the Standard (Canonical) POS Boolean logic expression formed by its maxterms. (10 pts)
e) State the POS solution you find above in the decimal format by completing the statement
below: (5 pts)
F(A,B,C,D) = ΠA,B,C,D
A B C D F
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 1 1 1
Page 8 of 9
Problem 4 – 10 points total
Write the Verilog code (use structural modeling) for the combinational logic diagram in problem 3 having inputs A, B, C, & D and
output F.
Page 9 of 9
Boolean Identities
No Name Rule Complement
1 Identity X + 0 = X X · 1 = X
2 Null element X + 1 = 1 X · 0 = 0
3 Idempotency X + X = X X · X = X
4 Involution (X’)’ = X
5 Complements X + X’ = 1 X · X’ = 0
6 Commutativity X + Y = Y + X X · Y = Y · X
7 Associativity (X+Y)+Z = X+(Y+Z) (X·Y)·Z = X·(Y·Z)
8 Distributivity X·Y+X·Z = X·(Y+Z) (X+Y)·(X+Z) = X+Y·Z
9 Covering X+X·Y = X X·(X+Y) = X
10 Combining X·Y + X·Y’ = X (X+Y)·(X+Y’) = X
11 Consensus X·Y+X’·Z+Y·Z = X·Y + X’·Z (X+Y)·(X’+Z)·(Y+Z) = (X+Y)·(X’+Z)
12 DeMorgan’s theorems (X1·X2· … ·XN)’ = X1’+X2’+ … +Xn’ (X1+X2+ … +XN)’ = X1’·X2’· … ·Xn’

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